1. Field of the Invention
The present invention relates to a multilayer wiring board. More particularly, certain embodiments of the present invention relate to multilayer wiring boards comprising conductive pads that have an upper surface that is recessed relative to the conductive pads' outer periphery portion.
2. Description of Related Art
A multilayer wiring board has generally been used as a package to be mounted with electronic components. In the multilayer wiring board, build-up layers are formed by stacking, one on top of the other, a resin insulation layer and a conductor layer on each side of a core board. In the multilayer wiring board, the core board is manufactured from, for instance, a resin including glass fibers, and plays a role of reinforcing the build-up layer by means of its high rigidity.
However, since core boards are thickly formed, core boards hinder miniaturization of the multilayer wiring boards. Further, wire length inevitably becomes longer since a through hole conductor for electrically interconnecting the build-up layers must be provided in the core board, which in turn may result in deterioration of high-frequency signal transmission performance.
Consequently, there has recently been developed a so-called coreless multilayer wiring board that is not provided with a core board and that has a structure suitable for miniaturization and enabling enhancement of high-frequency signal transmission performance (JP-A-2009-289848 and JP-A-2007-214427). In relation to such a coreless multilayer wiring board, a build-up layer is formed on a support whose surface is covered with, for instance, a peel sheet manufactured by layering two peelable metallic films one on top of the other. Subsequently, the build-up layer is separated from the support along a peel interface of the peel sheet, manufacturing the intended multilayer wiring board.
In the meantime, conductive pads that are situated on a semiconductor element mount area of the multilayer wiring board and that are intended to be connected to a semiconductor element through flip-chip bonding are formed beneath a resist layer that is located at the topmost level so as to become exposed through openings in the resist layer. Further, in some cases, the conductive pads are formed so as to protrude from the surface of the resist layer (JP-A-2009-212140). In such a case, when an attempt is made to feed solder paste to the conductive pads to thereby form a solder layer and bond a semiconductor element to the conductive pads by means of flip-chip bonding, the solder paste sometimes runs out from an upper surface of each of the conductive pads, which in turn hinders the solder layer from becoming sufficiently thick.
A defective connection to the semiconductor element or an insufficient thickness of the solder layer will consequently induce cracking, which in turn raises a problem of breakage of the solder layer.